Re: BYTE Article of Mega II

["Bryan Parkoff" <nospam@nospam.com>]

"Michael J. Mahon" <mjmahon@aol.com> wrote in message 
Qt6dnU5Dat06iNfbnZ2dnUVZ_tSunZ2d@comcast.com">news:Qt6dnU5Dat06iNfbnZ2dnUVZ_tSunZ2d@comcast.com...
> Henry wrote:
>> Hey Bryan.
>>
>>
>>>I stated earlier on the newsgroups.  I know Mega II chip is ASIC type. It 
>>>has eight 2 KB ROMs or one 16 KB ROM holding eight languages of character 
>>>fonts.  It is already had the answers how big ROM size can hold in the 
>>>Mega II chip.  I doubt to say there are other ROMs like RGB matrix.  It 
>>>is to be 3,000 gates for MMU, IOU, TMG, and GLU.
>>>   I can't imagine how big 3,000 gates are.  I wonder how did BYTE 
>>> authors know?
>>> What do you think?
>>
>>
>> Good question.  I too had often wondered about this fact.  The Mega II 
>> being one of the more interesting ICs in the IIgs has always caught my 
>> eye. If/when I get a few extra bucks I was going to purchase a good 
>> microscope, have the IC decapped and take a look around to see what I can 
>> see.  Maybe I can learn a little of how the chip is laid out.
>>
>> 3k gates really isn't that big from what I've been finding out.  I have a 
>> feeling either that number is wrong or Apple, who I assumed released that 
>> number in a technical briefing Byte used, may have misstated the number 
>> to obfuscate and deter reverse engineering.  Although I guess without 
>> really knowing what is actually going on in the chip no one can really 
>> say for sure that 3k isn't enough, but it sounds low to me.  I'm pretty 
>> sure I remember reading that 10k+ was possible back then from VLSI in 
>> that 68 pin PLCC form.
>
> A 3000-gate "gate count" is not particularly complex, even by the scale
> of 1984.
>
> "Gate count" usually refers to the number of 2-input NAND gates, and is
> often conventionally treated as one-third the number of transistors.
> Since 64Kbit DRAMs were pretty commonplace in 1984, with transistor
> counts of 65000+, a gate count of 3000 seems like a pretty simple ASIC.
>
> Think about the system it is implementing, the Apple II.  It has about
> 100 TTL SSI ICs, at about 4-10 gates/chip, for a TTL gate count of 600-
> 1200, plus a handful of ROMs and a 6502 processor.  The "3000-gate"
> number seems quite reasonable.
>
> As for the source, it would almost certainly have to be the chip
> designer at Apple, because he's the only one who would think of the
> chip in this way.
>
>> I now have the code for the GLU unit.  When I get the chance I'll have to 
>> study it and see what's actually going on and what logic it emulates. 
>> The TMG and GLU were pretty basic as far as custom logic goes.  The TMG 
>> only emulates something like 6 chips functions and GLU is probably 
>> something similar to that I have a feeling.  I assume the IIe which 
>> doesn't have a GLU uses standard logic.  Since the IIc needed to be as 
>> small as possible then the GLU was created.  Probably also saved Apple 
>> some money too like the HAL/TMG did in the IIe.
>
> In fact, "GLU" is actually a pun on "glue chips"--the handful of SSI
> chips often needed to hook LSI chips together, which it combines into
> a single package.  (Sometimes pin requirements prevent this simple
> combination.)
>
>> The IOU and MMU are quite a better example of what custom logic can 
>> accomplish.  Just compare a II+ board to a IIe board and you quickly 
>> realize how much space and power savings there was.  The HAL/TMG unit in 
>> the IIe has something around 200 gates according to the data sheet 
>> schematic and even more when viewed under a microscope.  And that's a 
>> 'simple' chip!  Now the MMU or IOU must have at least 1k each.  So 3k is 
>> possible, but I have a feeling there's much more in that chip then we 
>> think.  Of course I'm just speculating at this point and have no real 
>> data to back up my suspicions - yet. ;-)
>
> The complexity is determined primarily by the function to be performed
> and secondarily by the structure chosen to perform it.  If the ASIC's
> structure has a poor fit to the function, then it may require more gates
> to perform a function than a better suited structure.

Michael,

    Yeah, it makes sense what 3,000 gates meant.  Hopefully, the answer will 
be available to assure which RGB matrix does not have ROM.  I believe that 
RGB matrix is constructed by TTL gating.  I am the one annoying to post in 
the newsgroups when I am trying to get some answers from the non-existed 
research.  I am sure to see how microscope may be helpful to decap Mega II 
chip to find RGB matrix information.

Bryan Parkoff