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Re: Clone IOU / MMU Chip



Dave wrote:

The IOU & MMU also implement the

Apple IIe soft switches used to
control video display modes,

main vs aux RAM read/write usage,
16K Language card emulation,
C100-CFFF ROM space selection, cassette output
etc etc

ok..

all of the following should be easy, enable a select line
 when the address appears on the address bus:


I/O

 if address HIGH = C0

keyboard read C000
keyboard clear C010

spkr = c030

cass out = c020
cass in = c060

ann0 off c058
ann0 on c059

ann1 off c05a
ann1 on c05b
ann2 off c05c
ann2 on c05d
ann 4 off c05e
ann 4 on co5f

openapple/pb0 = c061
closedapple/pb1 = c062
pb2 = c063

reset pdl circuit = c070

pdl0 time c064
pdl1 c065
pdl2 c066
pdl3 c067

util stb c040


dothe IOU/MMU only have "select" outputs,
or does it handle logic of which address to send
during video phase?

CLR80STORE=$C000 ;80STORE Off- disable 80-column memory mapping (Write)

SET80STORE=$C001 ;80STORE On- enable 80-column memory mapping (WR-only)


CLRAUXRD = $C002 ;read from main 48K (WR-only)
SETAUXRD = $C003 ;read from aux/alt 48K (WR-only)

CLRAUXWR = $C004 ;write to main 48K (WR-only)
SETAUXWR = $C005 ;write to aux/alt 48K (WR-only)

CLRCXROM = $C006 ;use ROM on cards (WR-only)
SETCXROM = $C007 ;use internal ROM (WR-only)

CLRAUXZP = $C008 ;use main zero page, stack, & LC (WR-only)
SETAUXZP = $C009 ;use alt zero page, stack, & LC (WR-only)

CLRC3ROM = $C00A ;use internal Slot 3 ROM (WR-only)
SETC3ROM = $C00B ;use external Slot 3 ROM (WR-only)

CLR80VID = $C00C ;disable 80-column display mode (WR-only)
SET80VID = $C00D ;enable 80-column display mode (WR-only)

CLRALTCH = $C00E ;use main char set- norm LC, Flash UC (WR-only)
SETALTCH = $C00F ;use alt char set- norm inverse, LC; no Flash
(WR-only)
READROM  = $C082  ROM override
Bank 2 selection
RROMWRAM2 = $C081 READ ROM write RAM
RDWRTLC2  = $C083 Read RAM write RAM
READRAM2  = $C080 READ RAM no write
Bank 1 selection
RROMWRAM1 = C089  ReadROM Write RAM
RDWRTLC1  = C08B  Read RAM write RAM
READRAM1  = C088  Read RAM no write



the following would need extra logic, perhaps when
the appropriate softswitch is set, 1 bit of RAM
is set..

Bit seven of these Read Status locations is 1 if the condition is true

RDLCBNK2 =  $C011 ;reading from LC bank $Dx 2
RDLCRAM  =  $C012 ;reading from LC RAM
RDRAMRD  =  $C013 ;reading from aux/alt 48K
RDRAMWR  =  $C014 ;writing to aux/alt 48K
RDCXROM  =  $C015 ;using internal Slot ROM
RDAUXZP  =  $C016 ;using Slot zero page, stack, & LC
RDC3ROM  =  $C017 ;using external (Slot) C3 ROM
RD80COL  =  $C018 ;80STORE is On- using 80-column memory mapping
RDVBLBAR =  $C019 ;not VBL (VBL signal low)
RDTEXT   =  $C01A ;using text mode
RDMIXED  =  $C01B ;using mixed mode
RDPAGE2  =  $C01C ;using text/graphics page2
RDHIRES  =  $C01D ;using Hi-res graphics mode
RDALTCH  =  $C01E ;using alternate character set
RD80VID  =  $C01F ;using 80-column display mode