Re: How do I add firmware to a card?

["Alex Freed" <alexf@mirrow.com>]

"mdj" <mdj.mdj@gmail.com> wrote in message 
1168158928.054507.58270@51g2000cwl.googlegroups.com">news:1168158928.054507.58270@51g2000cwl.googlegroups.com...
>
> Since a command would have to be issued to the uC before a read occurs,
> it's therefore unnecessary to meet the timing requirements of the 6502
> access cycle.
>
> How did you solve the issue in your design, logic wise?

Send me an email if you want the Verilog source for the CPLD.

The idea is this. I have 16 bits of registers that are loaded with the 6502 
data on write
cycles and the 4 address bits and R/W loaded on all accesses. A flag is set 
after an access
that tells the (AVR) uC that it's time to see what's up. I use SPI to 
exchange data between the
CPLD and the uC to save pins. The first 8 bits - address and R/W - tell the 
uC if it needs to
also fetch the data byte. At the same time the holding data register inside 
the CPLD gets
the data from the uC that the 6502 will read on the next read access. Works 
well for floppy
emulation.

-Alex.