Re: PseudoDisk][ and IIGS

["Alex Freed" <alexf@mirrow.com>]

"RedskullDC" <RDC@oz.org> wrote in message
news:8Rbeh.4735$HU.2905@news-server.bigpond.net.au...
> Hi Alex,
>
> Is your circuit anywhere on the web? (Couldn't see it on your page).

http://www.mirrow.com/FPGApple/source/pd8.pdf

> Using 6522's on the Apple bus required lengthening the clock phases,

My design was based on DISK][ - /DEV signal used to enable
the data lines. This works great on a ][+ and //e, but apparently
IIGS is a bit different.

>
> Do you disable interrupts before a transfer?

No. That's a thought.
Interrups will explain random errors.

Again I was thinking //e when doing the design.

>
> Page 184 of the 2GS hardware manual gives more info on the timing.
> Can be found here:
> http://www.apple-iigs.info/doc/home.htm

Yes, thanks. I saw that, but alas it doesn't explain my problems.


> Have you tried setting the "speed" register at $C036 to force low
> speed during your accesses?

I don't have any room left in the ROM driver for that.
Only 256 byte window is currently mapped.

-Alex.