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Re: RFC : SOME IDEAS FOR THE APPLE II FPGA'ers
Jorge Chamorro Bieling wrote:
1.- Think of page 0 addresses as registers, you should put them where
they belong: inside the processor, not in memory.
Knowing very little about the 6502 instruction set off the top of my head -
is it possible to access page 0 using 'non-page 0 addressing modes or
instructions'? If so, that will be a problem.
2.- The same goes for the stack. Can it be a set of 256 registers ?
Ditto.
3.- If the memory bus was three bytes wide, a single cycle can present to
the processor both the opcode and the data in a single cycle.
Are *all* memory accesses on the A2 guaranteed to be benign? Or do some, for
example, clear interrupts? Or have other effects? Don't forget about add-in
cards here! Because if so, then accesses to adjacent memory locations could
inadvertently have side-effects.
I'm sure there's a number of ways to optimise the 6502, and the Apple II
design for that matter, in order to maximise performance. But, as Simon
pointed out, you're going to inevitably run into problems with software (or
firmware!) that use timing loops.
And personally, I'd ask "what's the point?" I'm interested in running an
Apple in an FPGA so that I can play the original games and run the original
software as it was meant to be run - and perhaps interface some modern
peripherals, such as VGA monitor, PC keyboard and storage devices. I don't
need to run word processing or database software on a turbo-charged A2 -
I've got a PC for that.
But each to his own... ;)
Regards,
--
| Mark McDougall | "Electrical Engineers do it
| <http://members.iinet.net.au/~msmcdoug> | with less resistance!"