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Re: 6502 illegal opcodes questions



Scott Hemphill wrote:
OK, here it is.  A is the accumulator, b is the argument (an unsigned 8-bit
quantity).  V, D, and C are booleans which represent the state of the
corresponding flags.  NZ is a byte which holds the state of the N and Z
flags.  The N flag is set if (NZ & 0x80) is true, and the Z flag is set
if (NZ == 0) is true.  w is a 16-bit unsigned scratch location.

These instructions were tested by running a PRODOS program which combined
each of the 256 possible accumulator values with the 256 argument values.
The 64K combinations were output as a 128K file containing a one-byte result
and one byte of flags.  The program was edited to produce 8 different
versions:  (initial C set/clear)x(initial D set/clear)x(ADC/SBC).  The
program versions were run on a Laser 128/EX and on an emulator, and the
results compared.  (All of this was done about 20 years ago.)

[code snipped]

Thanks a lot! Luckily the problem is small enough to allow for such complete verification, but I'm still glad I don't have to do it myself.

The only question that remains: is it true that the 65C02 take one extra cycle for ADC/SBC when then D flag is set? I'll have a look at the official data sheet.

--
Linards Ticmanis