Re: 6502 illegal opcodes questions

[dempson@actrix.gen.nz (David Empson)]

Linards Ticmanis <ticmanis@gmx.de> wrote:

> The only question that remains: is it true that the 65C02 take one extra
> cycle for ADC/SBC when then D flag is set? I'll have a look at the 
> official data sheet.

Yes, according to information in the data sheets (which I don't have
handy and can't verify).

The issue is that the original 6502 didn't implement all of the status
flags for ADC/SBC in decimal mode: the N flag in particular is not
updated (also the V flag, if I remember right). The Z and C flags are
handled correctly.

On the 65C02 they fixed the N flag for ADC/SBC in decimal mode (and
presumably also the V flag), but in order to do so they had to increase
the execution time of the instruction by one cycle (which only applies
if in decimal mode - in normal/binary mode, execution time is identical
to the 6502).

The 65802/65816 fixed it in a better way, restoring the original
execution time of the 6502.

This little detail (N flag not implemented for ADC/SBC in decimal mode
on the 6502) was used by a routine published in "Programming the 65816
et. al." by David Eyes & Ron Lichty which detected whether your code was
running on a 6502 or something later. A separate test was used to
distinguish between the 65C02 and 65802/65816, relying on the fact that
all undefined opcodes on the 65C02 are guaranteed to be NOPs, unlike the
behaviour of the 6502, so once the decimal ADC had revealed you weren't
on a 6502, it was safe to try using single-byte 65802/65816 instructions
(they would act like NOPs if you have a 65C02).

I recently reposted my extended version of this routine, which also
detects the Rockwell R65C02 and copes with the 65802/65816 running in
native mode with 8-bit registers rather than requiring it to be in
emulation mode (but my routine would also fail if the 65802/65816 was in
native mode with 16-bit registers).
-- 
David Empson
dempson@actrix.gen.nz