Michael J. Mahon wrote:
All good points. With newer, higher-density packaging, it's almost a requirement to go at least 4-layer. I hadn't considered the "small lot" problem for chips, but it certainly makes sense. And manually soldering high-density surface-mount chips is a losing proposition.
That's nothing - we're looking at doing a new board (for fun) with 672 pin FPGA and that will require 10 layers!
Regards, Mark