Re: Looking for "Ultima II" .nib images

["Michael J. Mahon" <mjmahon@aol.com>]

Linards Ticmanis wrote:
> Michael J. Mahon wrote:
>
> > Stephen Thomas has written a *very* short, but sophisiticated, DPLL-type
> > track read routine that determines the length of mixed 8-, 9-, and
> > 10-bit nibbles on the fly.  I'll ask him if he'd like to publish it.
>
>
> That'd be great.

Stephen has given permission to post his track read routine:

...

"I've written a little code fragment that reads a whole
raw Disk II track in one pass.  It's designed to store
normal 32-cycle data nybbles exactly as read, 36-cycle
selfsyncs with bit 7 cleared, and 40-cycle selfsyncs
with bits 7 and 0 both cleared.

"The track-read code uses the same kind of DPLL idea as
the NadaNet receive code - the read loop is normally
either 31 or 33 cycles (except once in every 256 bytes
when moving to the next buffer page, when it skips DPLL
sensing and runs 32 cycles instead).  If it senses
36-cycle disk data the loop stretches to 35-37 cycles,
or to 39-41 for 40-cycle data."

readtrk	ldx #$7F
	ldy #0
	lda #$67
	sty bufp
	sta bufp+1

dpll	lda diskrd	;check for data at rt=0
rt01	bpl rt04	;if none, check again at rt=7
rt03	bmi rt08	;if found, cut 2cy from loop

data40	and #$FE	;b0=0 marks 40cy selfsync
data36	and #$7F	;b7=0 marks selfsync
data32	sta (bufp),y
	iny
	bne dpll
	inc bufp+1
	bmi done

rt04	lda diskrd	;check for data at rt=7
rt08	cpx diskrd	;still valid at rt=11?
	bit diskrd	;still valid at rt=15?
	bcs data32	;gone by rt=11 -> 32cy data
	bpl data36	;gone by rt=15 -> 36cy selfsync
	bmi data40	;else it's a 40cy selfsync

done	rts

"A 40-cycle selfsync MUST have bit 0 set (and therefore
spare for my use) lest it violate of the max-two-zeroes
timing requirement; and I had initially thought that
the only place I'd ever see 36-cycle selfsyncs was on
13-sector disks coded with a no-more-than-one-zero
constraint, making their bit 0 free for my use as well.

"Sadly, though, 36-cycle selfsyncs do exist, and the
encoding I currently use will bugger them up if they're
even; they'll be mistranslated as 40-cycle selfsyncs
with incorrect data.  So far I haven't actually
encountered an even 36-cycle selfsync, but I still want
to make this go away by using table lookup to encode
40-cycle selfsyncs as illegal (three-zeroes) data.
It's hard to make the table lookup fit.  Work is ongoing."

...

Stephen has been busy with other activities recently,
but continues to think about this problem in the
background, with the intention of returning to it.

-michael

Music synthesis for 8-bit Apple II's!
Home page:  http://members.aol.com/MJMahon/

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