Basically, yes, so goes the theory.
The KEGS in-memory patch of the ROM was provided by Geoff Weiss.
Look around line 876 in src/dis.c of KEGS 0.86.
It provides a *very* small (several bytes) patch for only ROM 01 and 03.
Note: there are two separate small patches for each ROM version... the
first patch works around this bug and the second patch disables the ROM
checksumming done by the ROM self-tests. Both patches are only three
bytes each.
In both ROM cases, the offset is relative to bank $FC, location $0000.
E.g. ROM 01 offset of 0x30302 in the source means bank $FE, address
$0302... and is 770 bytes ($0302) from start of the ROM. ROM 01 only
occupied banks $FE and $FF.
ROM 03 offsets such as 30b means bank $FC, address $030B, 779 bytes from
start of ROM. ROM 03 occupied banks $FC, $FD, $FE, and $FF.
At least, that's how I think you'd translate the addresses in the KEGS
source for the patches to offsets to the ROM data.
You may need to get a more common 32-pin 128Kx8 (if ROM 01; otherwise,
256Kx8 for ROM 03?) EPROM and a 32-to-28-pin adapter to seat a modified
GS ROM chip in the GS. Haven't personally tried this one myself yet.
I know JDR sells three different 27C010 128Kx8 EPROMs; one is 45ns, one
is 70ns, and one is 150ns, for between USD $4-$6. They also have 256Kx8
32pin EPROMs; one is 150ns and one is 100ns, and both is between USD
$5-$6.
I don't recall how fast the GS ROM was; vague recollection of 120 or 150ns?
Not sure where you'd find a 32-to-28-pin adapter, though.
One other aspect of > 8 MB RAM operation on a IIGS that isn't clear to
me is if banks $80 through $EF (on a ROM 01; $80 through $DF then $E2
through $EF on a ROM 03) is controlled by the FPI as fast RAM or not.
That's from looking at the diagram on page 17 of the IIGS Hardware
Reference manual.