Re: "Co-Processor" Apple ?

[mjmahon@aol.com (Michael J. Mahon)]

Jeff Blakeney replied:

>On 07 Aug 2004 02:16:48 GMT, mjmahon@aol.com (Michael J. Mahon) wrote:
>
>>Actually, I currently have the 8 Apple //e boards in the AppleCrate
>>plus two I/O-configured Apple //e's.  I just tried a IIgs today, and
>>it works fine with the speed set slow--I need to find out how to
>>slow it down briefly so it can usually run fast.  (I had hoped that
>>a reference to a 5.25" disk controller address would work, but it
>>doesn't--have to hit the IIgs hardware manual...)
>
>Michael, in case you haven't already looked it up, the IIgs has a
>speed register at $C036.  Here are abbreviated descriptions of what
>each bit does taken from the Apple IIgs Hardware Reference Manual,
>Second Edition:

<snip description of IIgs speed register>

>It looks like you were trying the bits 0-3 trick but if you just want
>to control the speed manually, you just need to read this register,
>AND it with $7F and write it back, do what you want, read the register
>again and OR it with $80 and write it back again.  This should slow
>the processor down during you NadaNet code and keep it running at fast
>speed when it isn't.

Yes, except that the IIgs explicitly detects the "motor on" and
"motor off" references, while the Zip Chip just slows down for
38 milliseconds whenever any "slow" slot /DEVSEL address
is referenced.  This allows me to just reference the "motor off"
address at the start of any critical timing routine, none of which
exceed 30 milliseconds.

The IIgs scheme is more precise, but requires "ending slow mode"
code, too.

After my previous post, I went and cracked the manual and found
the speed register, too.  I was hoping for a method that would be
compatible between the accelerated //e and the IIgs, but using
the IIgs "bits 0-3" method would slow down the Zip Chip for a
longer time, and, of course, directly controlling the IIgs processor
speed (bit 7) won't do anything to the Zip Chip.  Any references
to the IIgs speed register will click the speaker on //e's.

Looks like I will need a separate version of NadaNet code for the
IIgs...

Can anyone give me a quick answer about how other accelerators,
both //e and IIgs, temporarily reduce speed?  (I would expect that
the IIgs accelerators track the $C036 register, but I have no idea
about the other //e accelerators.)

The _very_ good news to me is that the IIgs designers did not
repeat the hamhanded EMI fix of the Platinum //e, in which sizable
capacitors bypass the pushbutton inputs to ground, making them
useless as high-speed inputs.

-michael

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