[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: Applesoft I and II and floating-point performance



Paul Schlyter replied:

>...
>In the 80188 the integer multiply was implemented in
>hardware instead, resulting in a speedup of a factor of about 3: now
>it required only some 30 clock cycles.

If it takes more than 3 cycles for an integer multiply,
then it's not hardware--it's still microcode.

Building the microcode loop into a hardware state
machine is nothing like building a full multiplier array,
which all modern machines have (often multiple copies).

-michael

 Email:  mjmahon@aol.com
 Home page:  http://members.aol.com/MJMahon/