Re: Apple's next move (was Apple II just won't die.)

[sheldon@netcom.com (Sheldon Simms)]

In article <4jj53o$sdg@newsbf02.news.aol.com> rubywand@aol.com (RUBYWAND) writes:
>>Is the 6502 considered a RISC-type processor?
>>
>>I mean, the instruction set is limited to increments, decrements, loads,
>>stores, compares, branches and a couple of bit-setting (mostly Boolean)
>>operations...
>
>    Most designers seem to consider the 65xx and 65xxx uP's to be the
>closest thing to a single-chip CIS implementation of RISC principles.
>Really, given equivalent base hardware (e.g. max clocking speed, etc.) , a
>well-designed CIS should always out-perform a RISC predecessor.

I don't want to sound obnoxious, but are you nuts? One of the basic tenets
of RISC is that a simpler instruction set simplifies the hardware and
allows higher clock speeds. There are plenty of top notch chip desginers
out there. If a well-designed CISC architecture could outperform a RISC
architecture, they would be making CISC architectures.

>RISC offers the advantage of hardware and micro-coding flexibility.

RISC processors aren't microcoded, that's one reason why they're fast.

-Sheldon