Re: 65C02 emulation

[Charlie Springer <RAM@regnirps.com>]

On Tue, 26 Dec 2006 00:52:33 -0800, bieling@terra.es wrote
(in article <1167123153.546639.266310@h40g2000cwb.googlegroups.com>):

>> Jorge, thanks for the info. There are several small boards with ARM9 on them
>> now. So, as soon as I get an ARM7 working I can jump from 60 MHz to 200 MHz
>> for very little cost.
> 
> So, what development board are you using/considering to use  ?
> What IDE ?

I have a full PC imitator from VLSI (older ARM chips but same instructions as 
long as I don't need Thumb) and a board of my own with an Atmel with external 
RAM and ROM. I'm waiting for an Atmel EVB and might buy an Olimex board with 
peripherals.

I have just changed to Eclipse and a pre-compiled gnu arm-elf for the Mac. 
This way, everyone will be able to get development tools for free.

>> Also, Atmel has announced an ARM7T chip with some FLASH and RAM for less 
>> than
>> $3. I bet the parts cost for an emulation accelerator could be less than $10
>> excluding the PCB (which changes so much with volume). Might as well add the
>> CFcard capability and a few other goodies -- USB and Ethernet?
>> 
>> I was talking to an old friend who is a designer at Apple and we were
>> laughing about how we could use an ARM to "bit-bang" the Apple II bus. On a
>> one MHz bus we can do 200 ARM instructions per phase II cycle. He once
>> completely emulated the IWM in software and says the disk I/O and such "are
>> trivial". I bet I could set an interrupt on the Apple clock and meet all the
>> timing requirements for read/write using ARM I/O lines run by software.
>> 
>> -- Charlie Springer
> 
> I see. There are 200 ARM(9) "steps" in every Apple II 1000ns bus cycle.
> Between 60 and 80 for an ARM7. At first sight this gives you an
> "accuracy" of between 5 and 17 ns ! (For what it may be worth, remember
> that some Apple II cycles are longer than the rest)
> But do you know if the peripheral bus in and ARM9 runs at the cpu core
> speed ? I ask because even though that''s true for almost every ARM7 I
> have checked (although it has to be configured so, usually it defaults
> to a fraction of the speed of the ARM core), I'm not sure about ARM9's.
> The idea itself is funny. But then the clocks should be well locked and
> in phase. The difference in phase has to be accounted for (it worses
> the "accuracy" figure). And the clock jitter of the ARM, if any (it
> usually runs from a PLL). How many time have you got after the falling
> edge of the 6502 bus clock in order to sample reads from the Apple II
> MLB ?, I ask because there's the interrupt latency time. It does not
> look like a problem for writes to the Apple II MLB. In the end, I bet
> you'll prefer to use some glue logic (cpld) to ease the timing
> requirements. Although if you definitinely *want to*, you probably can
> go without it, at the cost of some ARM cpu bandwith. Probably you could
> even choose to poll the Apple II bus... :-)

The RAM bus can be set to Byte mode and full speed. True, I wouldn't want to 
waste resources bit banging the bus unless it turned out that there was so 
much idle time that it didn't matter. I imagine a MMU and a copy of the Apple 
ROMs and RAM contents in ARM RAM (the only way to get full speed) would be 
the fastest way to go.

> How's the project going ?

I'm putting the finishing touches on an ARM Forth I did for the VLSI board, 
which I use for testing and debugging. I may include it in FLASH on the ARM 
so that people can extend the emulator or write code that runs on the ARM and 
communicates with the Apple.

The plain emulator code will come first, then the question of what to include 
on the card, like USB and Ethernet or a VGA display driver.

-- Charlie Springer