Re: 65C02 emulation

[bieling@terra.es]

Charlie Springer wrote:

> ..I imagine a MMU...
>..
> -- Charlie Springer

Charlie,

Probably a second ARM may probe be a good candidate for the MMU
role...?

I thought about two LPC2106s, one running as a MMU and the other as the
CPU, the communication between them made by SPI, but the figures I get
for max SPI throughput are below a MByte/s...
The Apple II bus max throughput is a bit over 1MB/s, and both the
address and the data plus at least a bit to indicate a read/write has
to be communicated between the two arms, therefore the link has to be
of a bit over 3MB/s, unless I'm missing something here.
It seems, though, that other ARMS have speedier SPIs...
Another possibilty is to use both the LPC's SPI and serial ports in
parallel. But even then I don't get the needed 3MB/s.

What do you think about this ?

Regards,
Jorge Chamorro.