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Re: RFC : SOME IDEAS FOR THE APPLE II FPGA'ers
Michael J. Mahon wrote:
1. Implement a native 6502 to run as fast as possible. Of course the
core only has to be instruction set compatible, you can redesign the
bus architecture whatever way you like.
And there goes Apple peripheral compatibility--I'm out.
Exactly.
I'm also not inclined to expect anyone's pet 6502 project to be anywhere
near as "optimized" as a commercial RISC core, let alone as optimized as
a modern superscalar, multilevel-cache processor.
I'm talking about comparing a 'pet 6502 project' with a risk core running in
the same FPGA. And don't be so quick to equate 'commercial' with 'quality'.
You *assume* that bus compatiblity is not necessary
You *assume* that I/O is not a factor in system performance
You *assume* that any RISC core used for emulation would be off-the-
shelf
You *assume* that the number of RISC instructions executed is a critical
factor in performance
Huh? I'm assuming nothing of the sort! IIUC, you're trying to convince me
that, given the same silicon, a RISC core interpreting 6502 code can be made
to run faster than a native 6502, optimised implementation. And you'll never
be able to convince me.
--I say that each memory access takes several times
as long as a RISC instruction, and that many instructions will be
executed in the latency shadows of the memory accesses.
You even hint at it yourself - any core interpreting another is going to
require *several* memory accesses per emulated instruction. You may throw
caches and pipeling etc at it as you like, but my argument is that I can do
that with an optimised 6502 core too...
I know all about theories of performance, and more than a little about
performance realities.
I'm sure you do, just as I have had experience in implementations and
performances of FPGA-based CPU cores and associated bus architectures.
Perhaps the problem is we're simply arguing at cross-purposes here?
Regards,
--
| Mark McDougall | "Electrical Engineers do it
| <http://members.iinet.net.au/~msmcdoug> | with less resistance!"