Re: WDC and the 65C design continues to dominate!

[Rubywand <rubywand@swbell.net>]

Tom LeMense writes ...
>
> ....
>
> The 65C816 is already
> sporting a (poorly) segmented architecture with its 64K bank
> addressing capability, which I am sure was done for backward
> compatability issues, but just doesn't make for a very tidy
> architecture.  Picture trying to get high performance from a 32MB
> store divvied up into 64K non-overlapping pages...ick. ....
>

     4MB, 8MB, 32MB, ... it doesn't make that much difference. The 64k 
bank does a promote compact, efficient instruction set.

     A 40MHZ 65C816 capable of addressing 256MB with address-relative JSR 
instructions could be a good starting point for a new ][ series. The 
faster uP together with a faster main bus would end up running at 
something like 16-20 times current accelerated GS's.

     Then, we can add advantages of fully integrated Video/Sound 
sub-systems, standardized hardware, user-friendly OS, and thorough 
documentation. Apple Marketing would have a genuine 'giant killer'.


Rubywand