Steven Hirsch wrote:
mdj wrote:I had postulated that the original Transwarp would be slightly faster clock-for-clock than a ZipChip due to never having to incur a cache invalidation. As it turns out, even for simple cases this isn't true. IIRC, the Transwarp uses its 256kb of fast ram to replace the two 64k banks, ROM, and to cache the currently selected bank on a RamWorks card. Even with all that it's still vastly inferior to the Zip design.I'm on my second 8Mhz zip-chip and both have been flakier than all get out. But, that's probably just me.
No, Zip had some problems with packaging cache SRAM at some point. It sounds like you may have one or two of those... ;-( I have a couple of 8MHz Zip Chips that I use regularly, and they have proven very reliable (though an earlier one "back in the day" was plagued with intermittent problems, and was--eventually--replaced by Zip).
While it's true that the Zip doesn't operate with DMA disk controllers, I coded a hack to the Ramfast ROM that uses a small software loop tucked into the stack page for polled transfer. Makes things a tad faster than running from the controller ROM, which I do not believe is accessed at high speed. This was implemented at the prompting of Drew Vogan (ramfast designer). The source and object is available on your favorite A2 gmail account.
If the slot is set to "fast", its ROM will be cached and accelerated (though this may not be the case for the $C8xx space, with it's fancy bank switching). -michael NadaNet 3.0 for Apple II parallel computing! Home page: http://home.comcast.net/~mjmahon/ "The wastebasket is our most important design tool--and it's seriously underused."