Re: 6502 trashing memory cycles...

["Alex Freed" <alexf@mirrow.com>]

<bieling@terra.es> wrote in message 
1173255081.062048.275320@p10g2000cwp.googlegroups.com">news:1173255081.062048.275320@p10g2000cwp.googlegroups.com...
>
> I think that a circuit to flag these cycles may be quite simple:
>
> -A combinatory logic block in which the input is the opcode and the
> output are six bits, the state of these output bits (one for each of
> the six forthcoming memory cycles) flags the cycle as "borrowable" or
> not. These 6 bits fed the input of:
> -A parallel in serial out shift register that is loaded during SYNC
> marked cycles (during opcode fetchs), and clocked by phase 0.
>
> Unless I'm missing something, more or less, that's it.

I think one thing is missing here. On some instructions some cycles
may be needed sometimes and not needed at other times. It should
still work but not tag ALL of the "borrowable" cycles.

-Alex.