[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: Zip Chip programming info / disk image?

aiiadict@gmail.com wrote:

then maintain slow mode for a heuristically determined
50-or-so milliseconds after a slow slot /DEVSEL reference.



Interesting...  How do the heuristics work?


I presume that they simply tried shorter times until something
failed, then doubled it, or something like that.

The heuristics were performed by the designers, not the chip.  ;-)


Will a ~50ms slowdown work for all peripheral cards
that need 1mhz access?


A 52-54ms time is used for any /DEVSEL access to a slot set to
"slow".  When accesses to the speaker ($C030) or the paddles
($C070) are slowed down, the slow period is 5 ms.

All this is in the detailed documentation (TECH.DETAILS) file.


if this is all that the accelerator needs to do, then
all disk II, 5.25, 3.5 drive access code must work
like this (?)  :

lda $C600  (or STA)
...
...
access disk, time with loops
...
...
...



So the access to the $C600 would tell the
CPU to slow down, and the timing loops that
access the hardware will take a maximum of ~50ms ? 

The slow period is restarted when any reference occurs to the
$C0sx space, so while RWTS is accessing the controller, the
interval is being constantly reset.  Similarly for any code
that accesses, for example, an ACIA on a Super Serial Card.

Note that nothing depends on the /IOSELECT space ($Csxx).

-michael

Music synthesis for 8-bit Apple II's!
Home page:  http://members.aol.com/MJMahon/

"The wastebasket is our most important design
tool--and it is seriously underused."