[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: Zip Chip programming info / disk image?
David Wilson wrote:
then maintain slow mode for a heuristically determined
50-or-so milliseconds after a slow slot /DEVSEL reference.
So the access to the $C600 would tell the
CPU to slow down, and the timing loops that
access the hardware will take a maximum
of ~50ms ?
Accessing $C6xx causes /IOSEL #6 to assert. /DEVSEL #6 is $C0Ex and
this is what is used to detect when to slow down (after all, once the
Apple II is booted the $C6xx code never gets used again). I seem to
recall that the IIgs is clever enough to detect when the motor on
signal of a 5.25" drive is turned on and only slows down then.
You mean the disk select level, which starts the motor. (The motor
is on for a long time after the select level drops.)
Provided the loops keep accessing the Disk ][ registers the system will
remain in slow mode. 50ms after the last access it speeds up again.
Exactly.
In fact, I use (de-select) references to slot 6 to slow a Zip Chip down
during NadaNet packet sends and receives. ;-) The IIgs is somewhat
harder to control, since re-triggering a "temporary slow mode" is not
an option--instead, the speed-critical region(s) have to be "bracketed"
with "slow down" and "speed up" mode changes.
-michael
Music synthesis for 8-bit Apple II's!
Home page: http://members.aol.com/MJMahon/
"The wastebasket is our most important design
tool--and it is seriously underused."