Re: 6502 trashing memory cycles...

["bieling@terra.es" <bieling@terra.es>]

On Apr 1, 1:54 am, "biel...@terra.es" <biel...@terra.es> wrote:
>
> I'm starting to think that it's not too difficult to trap unused
> cycles for the conditional branches that are taken. When the branch
> opcode is fetched during SYNC cycles, the PC is revealed, and the
> offset is the byte read at the forthcoming, next, 2nd cycle. Using
> this data the destination for the branch is (easily) calculated, and
> if the address seen in the address bus at the 3rd cycle equals the
> calculated destination address, would mean that the branch is being
> taken. Even page crossings can be known, therefore trapping the 4th
> cycle during page crossings would also be possible.

In fact, if the 3rd cycle after a conditional branch fetch isn't SYNC-
marked, it means that the branch is being taken... and this is a yet
much easier circuit... :-)

Jorge.